Features
HBLL’s clock frequency runs at only 1GHz (2Gb/s/pin), yet its random-access bandwidth outperforms all JEDEC standard’s DRAMs on market.
A 4Gb HBLL-RAM die features an 8-Channel SRAM interface with 32 banks per channel, which optimized the array utilization and minimized the random-access latency.
2X Performance of HBM2
Random Access Bandwidth
Half Latency of HBM2
Random Access Row Latency
HBLL-RAM runs high performance computing AI with little energy consumption.
The short-page row access design greatly reduces not only the internal power noise, but also the energy consumption of each random row access.
One Third of LPDDR4
Energy Consumption per Bit Access
While all AI solutions benefit from high frequency and high bandwidth, not all are in need of high-density chips.
PieceMakers provide chips with varying densities, all with exceptional bandwidths to serve a diverse group of AI customers.
Massive data storage comes with a cost, but it is not necessary for all AI solutions.
PieceMakers provide low density chips without compromising frequency and bandwidth for AI solutions at a lower cost.
Additionally, HBLL-RAM provides a single-die with single-edge-pad allocation that can be integrated with the master chip in 2D SIP form without the use of 2.5D / 3D technology.
Key Features
1.2V core and I/O power supplies
Un-terminated LVCMOS interfaces
1GHz clock frequency,2Gb/s/pin data rate
4Gb with 8 Channels,32 banks per channel
Random access Bandwidth: 144 GBPS
Product List
HBLL
| Density | Bit Width | Voltage | Speed | Grade | Status |
---|
PLHP11440AK4 | Gb | | V | GHz | | |
Note
C - Commercial grade
I - Industrial grade
For data sheet and support,
please contact our sales representative.